1. Field of Invention
The present invention relates to an active matrix electrooptical panel such as a liquid crystal panel having a thin film transistor (referred to TFT hereinafter) addressing-type panel, and to electronic appliances using the electrooptical panel.
2. Description of Related Art
FIG. 16 shows an active matrix liquid crystal panel having a plurality of pixel electrodes 9a provided in a matrix and a TFT switching element 30xe2x80x2 for each pixel electrode. Scanning lines 3a and data lines 6a cross near each of the TFT 30xe2x80x2 and the pixel electrodes 9a are in electrical contact with a drain region of the TFTs 30xe2x80x2 via contact holes 8 in a TFT array substrate. Each TFT 30xe2x80x2 is constructed so that a channel region 1axe2x80x2 (the area indicated by hatch lines from the bottom to the left-top in FIG. 16) of a semiconductor layer a is controlled by a gate electrode 3axe2x80x2 extending from the scanning line 3a The data line 6a, which supplies image signals, is put into electrical contact with the source region of the semiconductor layer a via a contact hole 5. Since the pixel electrode 9a can be provided on various films including wiring connections for the TFT 30xe2x80x2, data lines 6a and scanning lines 3a, or on the interlayer insulation films for insulating the pixel electrodes 9a, the pixel electrode 9a is put into electrical contact with the drain region of TFT 30xe2x80x2 via the contact hole 8 formed in an interlayer insulation film.
To obtain a high resolution liquid crystal panel, pixels in the display must be made smaller (i.e., finer) and very precisely. However, narrowing the pixel pitch L as shown in FIG. 16 to enable fine and precise image display by increasing pixel density or to compact the liquid crystal panel causes spaces between wiring lines that serve as non-opening regions to be narrowed. One important factor typically required for a liquid crystal panel is, on the other hand, increasing the brightness of the panel. Increased brightness can be realized by increasing the aperture ratio of the pixel, i.e., increasing the ratio of the opening region of the pixel to the image display region of the pixel. However, the TFT region, which includes wiring lines and switching elements for a pixel, serves as a non-opening region and when the pixel is made to be fine, the TFT region limits the extent to which the aperture ratio of the pixels can be increased. Accordingly, making the pixels fine results in narrowing of the distance between the contact holes 8 for contacting the pixel electrodes 9a with the TFT 30xe2x80x2, and data lines 6a or scanning lines 3a, possibly causing fatal defects by forming short-circuits between the pixel electrodes 9a and respective wiring lines.
When increasing the aperture ratio of a pixel, it is important that, not only the wiring width of the data lines 6a and scanning lines 3a is narrowed, but also the TFT 30xe2x80x2 as a switching element is made fine. For that purpose, the size of the contact hole 5 between the source region of the semiconductor layer la and data line 6a, and the size of the contact hole 8 between the drain region and pixel electrode 9a of the semiconductor layer 1a should be made fine. FIG. 17 shows a cross-section of the TFT 30xe2x80x2 along the line D-Dxe2x80x2 in FIG. 16, indicating a process for opening the contact hole 8. As shown in FIG. 17(a), a gate insulation film 2, interlayer insulation films 4 and 7 and a resist 302 are formed over the semiconductor layer axe2x80x2. As shown in FIG. 17(b), a portion of the resist 302 is irradiated with light (to remove the resist 302 in the case of the positive-type resist) by exposing the resist 302 from the photomask side 303 through a hole in a chromium film 304 over the drain region 1e of the semiconductor layer 1a. However, the step between the interlayer insulation films 4 and 7 caused by the gate electrode 3axe2x80x2 causes a difficulty. When the contact hole 8 is formed in close vicinity to the gate electrode 3axe2x80x2 to make the size of TFT 30xe2x80x2 minute, light irregularly reflected by the step, causing a problem that the resist is exposed to light in the directions shown by the opposed arrows in FIG. 17(b). This leaves a pattern of the removed resist 302, or an opening for the contact hole, with a larger diameter than the hole in the light-shielding chromium film 304 on the photomask 303. When this removed resist pattern is etched as shown in FIG. 17(c), the diameter of the opening is larger than the pattern diameter for the contact hole formed on the photomask 303, causing a difficulty for making the contact hole 8 fine.
A high quality display image and low power consumption are frequently required in liquid crystal panels. Thus, micro-lenses may be used for enhancing the efficiency of light incident on the liquid crystal panels. In the conventional art shown in FIG. 16, the incident light is partially blocked by the light-shielding film 22 provided on the opposing substrate so that the light passes inside the dashed lines. If the region where the light passes is not in line symmetry relation to the center of the pixel aperture, it is impossible to effectively use the light passing through the microlens at a maximum degree, and sufficiently obtain the efficiency of the incident light.
The invention provides an electrooptical panel and electronic appliances that include the electrooptical panel that avoid decreases in process yield and pixel aperture ratio even when pixels are made fine.
The invention provides an electrooptical panel having a plurality of data lines and scanning lines intersecting with the data lines, thin film transistors connected to corresponding data lines and pixel electrodes electrically connected to a corresponding thin film transistor. The thin film transistors each have a semiconductor layer separated from a gate electrode by a gate insulation film. At least one interlayer insulation film is formed over the semiconductor layer and gate electrode, and the drain regions of the thin film transistors are electronically connected to the pixel electrodes via contact holes formed through the interlayer insulation film. The contact holes are disposed in close proximity to at least one of the scanning lines and data lines, and a lift-up film is formed under the contact holes.
In one aspect of the invention, the lift-up film is formed under the contact hole so as to reduce the step height between at least one of the scanning lines and data lines and flattening the surface of the interlayer insulation. Therefore, preventing disclination of the liquid crystal due to step formation is possible. While a resist mask can be formed on the interlayer insulation film for allowing a desired region of the interlayer insulation film to be removed, reflection of light on the film surface can be suppressed to prevent retreat of the resist when the resist mask is exposed during a photolithographic process. Thus, the contact holes are formed with approximately the same size as that of the pattern on the mask. Accordingly, the dimension of the opening for the contact hole is not enlarged thereby increasing production yield with respect to pixel defects. Making the dimension of the contact holes accurately also allows the pixels to be made fine, thus providing a fine, precise and compact electrooptical panel.
In one aspect of the invention, at least one of the scanning line and data line, and the lift-up film have approximately the same film thickness.
The invention also provides an electrooptical panel having a plurality of data lines and scanning lines intersecting with the data lines, thin film transistors connected to corresponding data lines and pixel electrodes electrically connected to a corresponding thin film transistor. The thin film transistors each have a semiconductor layer separated from a gate electrode by a gate insulation film. At least one interlayer insulation film is formed over the semiconductor layer and gate electrode, and the drain regions of the thin film transistors are electrically connected to the pixel electrodes via contact holes formed through the interlayer insulation film. A capacitor line serves as one electrode of a capacitor and is aligned approximately parallel with the scanning lines. The contact holes are disposed between each scanning line and each capacitor line, and a lift-up film is formed under each contact hole.
In one aspect of the invention, the contact holes are provided between the scanning lines and capacitor lines and the lift-up film is formed under the contact hole making it possible to reduce the step height between the scanning line and capacitor line, thereby flattening the surface of the interlayer insulation film. Forming the contact hole between the scanning line and capacitor line allows the contact hole to be provided in the region where light is shielded by fitting the scanning line and capacitor line in the same region as the disclination region formed by the transverse electric field generated between the two adjoining pixel electrodes in the conventional art. Accordingly, disclination of the liquid crystal can be prevented along with suppressing the dimension of the opening of the contact hole from being broadened when the resist mask is exposed in the photolithographic process.
In one aspect of the invention, the scanning lines and capacitor lines are simultaneously formed using the same material, the gate insulation film and the dielectric film of the capacitor are simultaneously formed using the same material, and the semiconductor layer and the other electrode of the capacitor are simultaneously formed using the same material.
In one aspect of the invention, the scanning line and the capacitor line are nearly leveled with each other to reduce the step height between them. Since the lift-up film can be tailored to match to this step height, the step height between the scanning line, capacitor line and contact hole can be easily adjusted along with leveling their upper surfaces with respect to each other, thus making the contact holes fine and decreasing disclination.
In one aspect of the invention, at least a part of the lift-up film is formed so as to surround the contact hole, and at least one of the scanning lines is formed to be hollow along the lift-up film.
In one aspect of the invention, at least a part of the lift-up film is formed along the contact hole forming region and at least one of the scanning line and capacitor line is aligned along the lift-up film. Therefore, the aperture ratio is not decreased for the pixels even when the scanning line is disposed in close proximity to the capacitor line, thereby enabling the formation of a contact hole with a large opening area between the scanning line and capacitor line.
In one aspect of the invention, the lift-up film is formed so that the film does not overlap with the scanning lines and capacitor lines.
Accordingly, a step owing to overlap of the scanning line or capacitor line and the lift-up film is not generated so that their upper surfaces are more level with respect to each other, thereby further preventing disclination of the liquid crystal from being formed by the step or broadening the opening of the contact hole.
In one aspect of the invention, the lift-up film has the same film thickness as at least one of the scanning line and capacitor line.
In one aspect of the invention, adjusting the film thickness of the lift-up film to be approximately equal to that of at least the scanning line and capacitor line allows the step height between the lift-up film, and at least one of the scanning line and capacitor line, to be smaller.
In one aspect of the invention, the lift-up film is a conductive film in electrical contact with the drain region.
Accordingly, the lift-up film serves as an etching stopper in forming the contact hole provided that the lift-up film is formed on the drain region. On the other hand, when the lift-up film is formed under the drain region, pixel defects can be avoided even if the contact hole has penetrated through the drain region since the lift-up film is in electrical contact with the conductive film
In one aspect of the invention, the lift-up film is a conductive film simultaneously formed on the drain region using the same material as used in the data line.
In one aspect of the invention, the lift-up film can be formed without increasing the processing steps since the lift-up film is simultaneously formed on the drain region using the same material as used in the data line.
In one aspect of the invention, the lift-up film is a conductive film formed under the drain region.
In one aspect of the invention, pixel defects can be avoided even if the contact hole has penetrated through the drain region since the lift-up film is in electrical contact with the conductive film. Accordingly, the semiconductor layer can be made thin to enable a high speed writing, thus providing an electrooptical panel with a high contrast ratio.
The invention also provides electronic appliances provided with an electrooptical panel.
In one aspect of the invention, a bright and high quality image display is made possible by using an electrooptical panel having a wide irradiation area to the opening region by which the luminous energy efficiency is improved.
In one aspect of the invention, the invention provides an electrooptical panel comprising a plurality of data lines, a plurality of scanning lines crossing with the plurality of data lines, a switching element connected to each data line and scanning line, and a plurality of pixel electrode disposed in a matrix while being connected to the plurality of switching elements on the first substrate, the pixel electrodes being connected to a switching element via a contact hole, the contact hole being allowed to open at nearly a center position between the data line for supplying image signals to the pixel electrode and the data line adjoining the foregoing data line. Accordingly, the contact hole being allowed to open on the interlayer insulation film for connecting the TFT drain region as a switching element to the pixel electrode is formed at a nearly center position between the data line for supplying image signals to the corresponding pixel electrode and the data line adjoining to the foregoing data line to prevent the data line and pixel electrode from forming a short circuit between them, thereby not causing any decrease in the production yield and pixel aperture ratio even if the pixels become minute.
In one aspect of the invention, capacitor lines for endowing the respective pixel electrodes with a prescribed capacitance are provided on the first substrate in parallel relation to the scanning lines, wherein the contact hole is allowed to open between the capacitor line and scanning line in adjoining relation with each other.
Accordingly, the TFT as a switching element and the contact hole for putting the pixel electrode in electrical continuity cause disclination of the liquid crystal due to step configuration between them. However, providing the contact hole between the scanning line and capacitor line makes it possible to fit the TFT into the region where disclination of the liquid crystal due to transverse electric field among the pixels is generated The configuration described above allows non-opening regions, forced to be light-shielded to suppress generation of the liquid crystal disclination, to be adjusted to a minimum proportion. Providing the data lines for endowing the pixel electrode with capacitance in order to retain writing charges of the pixels in the disclination generating region allows to provide an electrooptical panel with a high image quality without decreasing the pixel aperture ratio. Since the contact hole is allowed to open by taking advantage of the space between the adjoining capacitor line and scanning line without sandwiching the contact hole between them, the opening region whose width along the data line direction is prescribed by the capacitor line and data line can be broadened within each pixel disposed in a matrix. Accordingly, the luminous energy efficiency is improved as compared with the case when the contact holes are formed at the corner of each pixel.
In one aspect of the invention, least a lift-up film is provided under the switching element and just under the contact hole. Accordingly, a lift-up film is placed under the semiconductor layer of the TFT at a prescribed position for allowing the contact hole, provided for connecting the TFT as a switching element to the pixel electrode, to open, so that pixel defects can be prevented from occurring even when the contact hole opened by the etching process has penetrated through the semiconductor layer. This configuration makes it possible to thin the semiconductor layer, providing an electrooptical panel having a high contrast ratio since a high speed writing characteristics can be obtained.
In one aspect of the invention, the switching element comprises a thin film transistor, the source region of the thin film transistor being in electrical continuity with a data line, the drain region of the thin film transistor being connected to the pixel electrode, and the lift-up film as a conductive film being in electrical continuity with the drain region. Accordingly, the lift-up film is put into electrical continuity with the drain region of the TFT semiconductor region as a switching element. The lift-up film is formed of a conductive film of a poly-silicon film, a high melting point metal film such as a W (tungsten), Ti (titanium), Cr (chromium), Mo (molybdenum) or Ta (tantalum) film, or an alloy film thereof Therefore, any pixel defects are not caused even when the contact hole penetrates through the semiconductor layer in opening it by an etching process, because the lift-up film is put into electrical continuity.
In one aspect of the invention, the lift-up film is provided so that the film is not overlapped with the scanning line and capacitor line. Accordingly, the lift-up film provided under the TFT drain region of the TFT semiconductor layer is placed not to overlap with the scanning line and capacitor line provided on the semiconductor layer via the gate insulation film. This means that the surface of the interlayer insulation film on the drain region of the semiconductor layer can be approximately flattened. A resist mask is formed at the region where the interlayer insulation film is not removed for opening the contact hole at a prescribed region of the interlayer insulation film. However, when the surface of the interlayer insulation film is flattened in exposing the resist mask by the photolithographic process, reflection of light on the film surface can be suppressed to prevent the resist from being retreated, thereby making it possible to form the contact hole with the same dimension as that of the mask. Accordingly, no decrease of the production yield due to pixel defects is caused since the diameter of the opening of the contact. hole is never broadened. Making the contact hole fine also allows the pixel to be fine, thus providing a highly precise and compact electrooptical panel.
In one aspect of the invention, the film thickness of the lift-up film is nearly equal to the film thickness of the scanning line and capacitor line. Accordingly, more flattening of the surface of the, interlayer insulation film on the TFT drain region is made possible by adjusting the film thickness of the lift-up film to nearly equal to the film thickness of the capacitor line and scanning line, further preventing the resist mask from being retreated, making the dimension of the contact hole finer and enabling the pixel to be fine, which is advantageous for making the electrooptical panel precise, fine and compact.
In one aspect of the invention, the opening region has a plane configuration being in a line symmetry relation to the contact hole. Accordingly, the contact hole for putting the TFT drain region into electrical continuity to the pixel region is allowed to open at the position in line symmetry relation to the center line of the opening region. Therefore, the opening region with a line symmetry, disposed in a matrix and situated at near the center within the respective pixel having a square shape, can be broadened, wherein the steps of the pixel electrode around the contact hole are distributed in line symmetry relation to the opening region Accordingly, possibility of orientation faults such as reverse tilt becomes almost equal even when a levorotatory liquid crystal or a dextrorotatory liquid crystal is used. In other word, the case when distinct orientation faults occur when either the levorotatory or the dextorotatory liquid crystal is used can be obviated, being advantageous since either type of the liquid crystal can be equally used. Moreover, luminous energy efficiency can be improved as compared with the case when a circular light irradiation region having no line symmetry is formed in the opening region as a result of forming the contact holes at the comer of each pixel as in the conventional art shown in FIG. 16.
In one aspect of the invention, a micro-lens is provided at a position confronting each pixel electrode so that the center of the lens is situated at the center point of the opening region. Accordingly, since the center point of the circular light irradiation region by the micro-lens is focused on the center point of the opening region of the pixel, the proportion occupied by the light irradiation region to the opening region is increased to improve luminous energy efficiency, thereby enabling to provide a luminous electrooptical panel even when the pixels are made fine.
The foregoing and other objects, features and advantages of the present invention will be apparent from the following more particular description of a preferred embodiment of the invention as illustrated in the accompanying drawings.